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SAR ADC response times: Interface topology makes a difference (Part 2)

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In my previous blog post, I explained a simple serial interface in which each data bit is transferred as it is resolved. I also noted that this type of interface is usually restricted to lower resolution or lower speed. Most of the modern, high-resolution (>12 bits) successive approximation register (SAR) analog-to-digital converters (ADCs) employ redundancy and error-correction techniques to improve the performance of the ADC, especially at higher throughput rates. In such ADCs, the final conversion result is available only after the entire conversion process is complete.(read more)

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