Avoiding common logic design issues

Engineers encounter large array of logic devices, but selecting the device that finally “fits the bill and cuts the deal” for the system can be a challenge to conquer. There are also time-consuming tasks: reviewing application notes and data sheets, asking field application engineers how the part works, and dealing with design issues after putting the device into a design.

In this post, I will answer a few common questions and issues about logic devices in the hope that I can save you time and that awful feeling of not knowing where to start debugging.

Q: Can I have the input greater than V_cc?

A: It depends. Today’s devices can handle overshoots and undershoots fairly well; however, to have a constant voltage higher than V_cc, the device must be built to handle it. The datasheets usually specify if the device is overvoltage-tolerant or not, which is a direct indicator of its ability to handle higher inputs. Looking at the electrical specifications of the input-voltage ratings on the data sheet, if it specifies something like V_in= V_cc +0.5V, that indicates that the input has a diode to V_cc. Applying any voltage higher than V_cc starts to forward bias the diode which is unsafe for the device . This also means that you cannot apply voltage higher than V_cc at the input.

Q: Will the device safely handle higher input and output voltages when it is powered off?

A: This partly ties back to the first question. If the part doesn’t have a diode to V_cc, as mentioned above, then check for the I_off parameter in the datasheet; this indicates that the device can handle voltages on its inputs and/or outputs when the device is turned off. The device generally starts to shut down around 0.6V and goes into I_off mode around 0.5V V_cc as indicated in Figure 1.The I_off specification also states how much current goes into the device’s inputs /outputs during I_off mode. This I_off protection circuitry enables you to bypass the V_cc + 0.5V input condition on the electrical specification, but this is valid only when V_cc is powered off. For any V_cc higher than 0V, the diode is forward biased for inputs greater than V_cc.

Figure1: I_off plot for SN74CB3Q3384A bus switch.

Q: Why is my device drawing higher than normal current?

A: Check the input voltages with respect to V_cc. As shown in Figure 2 below, I_cc current consumption is highest at about half the V_cc for CMOS (Complementary Metal oxide semiconductor) parts.

Figure 2: Typical V_in vs. Icc plot for CMOS

The higher current can also start to heat up the device; without appropriate care on the heat sink design, this can be damaging to the device or reduce the reliability of the system. You can also use level translators to make the V_cc and inputs compatible to avoid these issues.

I hope this brief Q&A helps you with your next logic design. Comment below to let me know if this was helpful and if you would like me to cover any other common issues encountered during logic design or if there are other logic topics in general you would like us to cover on Analog Wire.

Additional resources

• Read the application note, “Understanding and Interpreting Standard-Logic Data Sheets.”
• Learn “how to select logic”
• Check out this white paper on the “Implications of Slow or Floating CMOS Inputs.”
• Visit the TI E2E™ Community Logic forum to find more questions and answers from TI’s logic team and fellow engineers.