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Clocks: The last thing may bite the hardest

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Clocks are probably the last thing that you think about when you are designing your system. Unless you are doing a simple system where one or two clock signals are required, you would be remiss if you chose to not think about your clocking scheme early on. For example, Ethernet switches require a large variety of clock frequencies system wide. Figure 1 shows an example of an Ethernet switch block diagram that contains five clock blocks.

Figure 1.  Ethernet switch block diagram with extensive clocking requirements.

The first step in the clock system design is to map out your input and output signals. At this level you define input/output frequencies, output formats, and the number of ports. Once your find a list of possible clocking products that you can use for your application, you dig into issues such as data integrity, low jitter, and phase noise.

This is quite a wish list for a clock system design, but let’s take a look at a specific application requirements. For example, you may require a clocking system for your Ethernet that has the following requirements:

  • Input Frequency
  • 25 MHz
  • 2 available
  • Output Frequencies
    • Group 1
      • 125 MHz
      • LVDS
      • 4 outputs
    • Group 2
      • 156.25 MHz
      • LVDS
      • 4 outputs
    • Group 3
      • 50 MHz
      • LVCMOS
      • 1 output

The integrated circuit system that solves this problem does exist, however the search time may be very lengthy for the average designer. An alternative to perusing through product data sheets is to look for tools to help you through this tedious task.

The Texas Instruments tool that solves these problems is the WEBENCH® Clock Architect. This tool helps you find appropriate devices from your clock system and provides opportunities to simulate the systems performance.

The first screen (Figure 2) with Clock Architect immediately asks you to describe the input/output requirements of your system.

 

Figure 2. Clock system input and output specifications

Once you enter your system requirements and click the green “Generate Solutions” button. The recommended solution to your problem appears (Figure 3) along with several other options in the table below the solution.

Figure 3. Clock system solution(s).

As you look at the various circuit options, you can view your design’s solutions report. If you click on one of the solution alternatives, the recommended solution block diagram will change. From this view, you can view the solution report.

 

Figure 4. Clock system design summary

In the solutions report you will see the system summary that recaps the cost, area, and current combinations of your block diagram and further details about each device. This blog gives you a simple overview of this software, but there is more capability buried deeper as you start to play with this site. Give it a whirl! Click on WEBENCH® Clock Architect and let me know what you think.


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