Guest post by Adam Reynolds, Application Engineer, LineStream technologies

Have you wondered how to design real-time velocity and position control applications? In this blog post, we’re going to show you, step by step, how to achieve optimal dual-axis speed and position control on a bench-top router (Figure 1) using the TI C2000™ Piccolo™ F2806x InstaSPIN-MOTION™ LaunchPad development kit.

Figure 1. 15"x15" bench-top router

In less than 20 hours, the router was drawing squares, triangles and circles.

Figure 2. Timetable for bench-top router to create motion profiles

Step 1 – Connect servo motors to the X and Y stages

If you’re working on a multi-axis application, you’ll need to design your own board. We took a preliminary step using two TI InstaSPIN-MOTION LaunchPad development kits. The LaunchPad includes hardware to interface to two BoosterPacks which can each control a motor, but the software framework to do so is still being finalized and will be released in a future version of MotorWare.

Material List:

• 2 C2000 Piccolo F2806x InstaSPIN-MOTION LaunchPad development kits (LAUNCHXL-F28069M)
• 2 DRV8301 Motor Drive BoosterPacks (BOOSTXL-DRV8301)
• 2 Low Voltage Servo Motors with encoder (LVSERVOMTR)
• MotorWare™ software

We used the InstaSPIN-MOTION Position Plan Component to create and execute the state transitions for the X and Y axes. When using two LaunchPad development kits, the Position Plans communicates over GPIO, which introduces a small amount of delay. When you design your own board, you’ll still run two Plan components, but they will communicate through variables rather than over GPIO, which will produce a more precise start.   In addition, you will be able to control both axes from a single TI C2000 Piccolo TMS320F28069M microcontroller, which is quite a cost savings.

Step 2 – Identify the system inertia of each axis

Inertia includes anything that is rigidly coupled to the motor shaft. It includes anything that moves directly with the motor. For the CNC Router, the X axis has different and independent inertia than Y axis.

We used the InstaSPIN-MOTION Velocity Identify component to identify the inertia. We set each stage so that it had the entire range of positive motion because the inertia identification always rotates the motor in positive direction. We then used the InstaSPIN-MOTION MotorWare Lab 12a software, which identified both the inertia and the friction. The inertia value is an input to the InstaSPIN-MOTION position controller, which uses it to provide the appropriate torque to get the application moving.

Here’s a quick video of the Inertia identification process for the X axis. It moves fast, so watch closely!

Step 3 – Tune the controller

Speed and position are tuned at the same time, using a single gain called bandwidth. Each axis is tuned independently. The tuning process is simple and straightforward. Using MotorWare Lab 13a software, we adjusted the bandwidth, injected a disturbance and evaluated the position hold. This process was repeated until the axis demonstrated good holding position at 0 speed when the system was disturbed. We set the initial bandwidth to 10 rad/s, and then manually injected a disturbance. The arm moved easily at this setting. As we increased the bandwidth, it became more difficult to move the axis. At 40 rad/s, the router table’s X axis was holding the position really well.

Here’s a video of the tuning process.

Step 4 – Optimize acceleration and jerk

We then set out to optimize acceleration and jerk (jerk is the rate of change of acceleration). The trapezoidal curve was used to optimize acceleration because this curve ignores jerk. Each axis was commanded to move back and forth while the acceleration was slowly increased. Optimal acceleration occurs just prior to the point when the motor fails to reach the commanded value.

 Once we found the optimal acceleration, we then optimized the jerk, using the st-curve, which features continuous jerk. The jerk was adjusted so that the router exhibited smooth starts and stops with a very high degree of reliability.

Step 5 – Create a square motion profile

It’s pretty easy to make the router draw a square – only one axis moves at a time. A Position Plan was created for each axis. In our configuration, the X axis was the master. The X axis plan signaled the Y axis to start moving. The Y axis plan signaled X when its move was complete.

Figure 3. Creating a square motion profile

Step 6 – Create a triangular motion profile

Drawing a triangle was more difficult. The X and Y axes had to be coordinated to draw the sloping sides. A few calculations were required to generate the motion plan for each axis, using the equation:

 Vel = d_{position_step}/t

Vel = velocity

d = distance

t = time

Each axis was required to complete the move at the same time, therefore:

t_x=t_y

The travel distance (d_{position_step}) was known. By fixing the velocity for the X axis, this gave us a known time (t_x) and from there we were able to calculate the velocity of the Y axis (Vel_y).

Figure 4. Creating a triangular motion profile

Step 7 – Create a circular motion profile

The circular motion profile is the most complex of the three shapes. We cheated a little bit on this one. The actual shape is a 32-sided polygon. It approximates a circle but is less computationally intensive. We used Matlab to calculate the X and Y axis positions. From there, we used the same procedure used in the triangle motion profile to ensure that each X and Y movement ended at the same time.

Figure 5. Creating a circular motion profile

Watch a video of the finished project.

The InstaSPIN-MOTION LaunchPad

The InstaSPIN-MOTION LaunchPad has a 90-MHz C2000 Piccolo F28069M MCU, an emulator and the InstaSPIN-MOTION software all in one package. You can use it to develop sensorless or sensored motor control applications. It also comes with hardware design package including gerbers, schematics and a bill of materials. It features MotorWare example software that has everything needed to get your motor running.

 Perhaps the best part is the price. The LaunchPad is only MSRP $25 USD from the TI Store and authorized distributors. It can connect with most of the BoosterPacks, including the DRV8301 Motor Drive BoosterPack featuring a 240W 3- phase inverter, which is available for $49.

 Be sure to post a description of your LaunchPad projects below. I can’t wait to hear about the cool applications that you can develop with this tool!

Have you designed a power supply only to find out later that your layout was inefficient? Follow these key tips to create a power supply layout and avoid the stress of debugging.

1.       Layout of the power supply is crucial to the success of the design.

Many times I have spent hours and sometimes days in the lab trying to figure out a noise issue or some sort of strange behavior that cannot be explained.  Some of these issues can baffle even the most seasoned engineer.  A little extra time spent at the beginning of a design reviewing and ensuring the power supply layout is done correctly can save hours of debug time in the lab.

2.       Proper placement of high di/dt capacitors in a system is a good first step.

The input capacitors in a buck converter see discontinuous current steps that can be quite large in magnitude.  Essentially these capacitors deliver the output current during the time the high side MOSFET is conducting and nothing when it is off.  This stress creates very high RMS current in these components.  The same can be said about the output capacitors in a boost converter.  The flyback converter has high di/dt current steps on both input and output capacitors.  It very important to make sure the loop created by the switches and these capacitors is minimized.  Figure 1 shows an example of buck converter with good bypass and a buck converter with a bypass that needs improvement.

A few things to note about the good vs. bad:

1. Minimize the loop between VIN and GND
2. Use many vias to connect the GND side to large planes
3. Place the smaller case size capacitors closer to the MOSFETs
4. Use large planes to connect the power buses

3. Poor capacitor placement can lead to noise, ringing, EMI issues and interference with other signals and systems.

Parasitic inductance due to poor capacitor placement can lead to a multitude of issues that may be hard to solve.  If this occurs, steps will need to be taken to reduce the effects.  These could include adding resistors to slow down switching or snubbing circuits to help absorb the unwanted energy.  Both of these approaches will cause losses in the system and thus are undesirable if the situation can be avoided.

PCB layout is a vast topic with many resources, this is just one example.

The capacitor placement for a buck converter is one of the most important issues with the board layout.  This is usually the first thing I check when reviewing boards.  However, this is just one very small part in a topic that is too important to be glanced over.  There are books, articles, blogs and a plethora of more information regarding board layout.  One of my favorite resources to check for a number of layout tips and techniques is a topic from the TI Power Supply Design Seminars, titled, “Constructing Your Power Suppy – Layout Considerations”. For more topics from this same series, visit this link.

This is a guest blog post by Bart Basile. Bart is a systems and applications engineer in the Texas Instruments' Smart Grid and Energy Solutions Team, focusing on renewables and distributed generation.

The new FRAM based MSP430FR5969 LaunchPad (MSP-EXP430FR5969) has a lot of great technology to help enable ultra-low-power applications. However, the stock 8MHz enabled in Energia (the software prototyping platform for TI's LaunchPads), can be limiting for some applications, despite the energy consumption benefits. While the FRAM technology itself is limited to an 8MHz read speed, it is rare that you will be clocking data out at this full rate, so to enable the faster core clock, a buffer was added to the memory so the two can operate asynchronously.

In Energia, we are used to the handful of board options available out of the box. We see that the other LaunchPads have various clock speed options, but the MSP430FR5969 microcontroller currently lists 1 8MHz option. While this is useful for many applications, there are occasions where we need 16MHz. A simple example is the usage of WS28xx addressable LEDs that are very popular in the community. In fact, there is already a library supporting them on the MSP430, it just requires a 16MHz core clock since the timing is so critical. We know that 16MHz is supported in hardware, so let’s go ahead and enable it in Energia!

In your Energia directory, navigate to /hardware/msp430/. Here you’ll find the “boards.txt” file which defines all the support MSP430 LaunchPads. Go ahead and open it in your favorite text editor. If you scroll to the bottom, you’ll find the section for the FR5969 MCU, titled “lpmsp430fr5969.name=LaunchPad w/ msp430fr5969 (V2.0 and higher only!).”  There are two f_cpu defined there:

#lpmsp430fr5969.build.f_cpu=16000000L

lpmsp430fr5969.build.f_cpu=8000000L

The octalthorpe in front of the first line is a comment, so only the 8MHz line is active. A simple solution would be to just uncomment the 16MHz line, and comment the 8MHz line, but we don’t want to have to re-edit this file if we want 8MHz in the future. Another solution is to create a new board entry to support 16MHz.

You’ll notice that each line is prefixed with “lpmps430fr5969,” which is the name of the board that Energia uses to populate its lists. What we’ll do here, is rename the board to denote that it’s 8MHz on each line.  Here’s an example:

lpmsp430fr5969_8.name=LaunchPad w/ msp430fr5969 (8MHz)

So the board’s technical name is lpmsp430fr5969_8, and the name in Energia will be marked as 8MHz.  Go ahead and change the other technical names in the entry to match.

Now, we can copy this block to create a new board entry, and change it to 16MHz. The name I used is:

lpmsp430fr5969_16.name=LaunchPad w/ msp430fr5969 (16MHz)

We also need to be sure to rename all of the lines in this new block, uncomment the 16MHz cpu clock line, and then comment or delete the 8MHz line.  Here’s the final two board entries that I have in my list:

lpmsp430fr5969_8.name=LaunchPad w/ msp430fr5969 (8MHz)

lpmsp430fr5969_8.upload.protocol=tilib

lpmsp430fr5969_8.upload.maximum_size=65536

lpmsp430fr5969_8.build.mcu=msp430fr5969

lpmsp430fr5969_8.build.f_cpu=8000000L

lpmsp430fr5969_8.build.core=msp430

lpmsp430fr5969_8.build.variant=launchpad_fr5969

lpmsp430fr5969_8.upload.maximum_ram_size=1024

##############################################################

lpmsp430fr5969_16.name=LaunchPad w/ msp430fr5969 (16MHz)

lpmsp430fr5969_16.upload.protocol=tilib

lpmsp430fr5969_16.upload.maximum_size=65536

lpmsp430fr5969_16.build.mcu=msp430fr5969

lpmsp430fr5969_16.build.f_cpu=16000000L

lpmsp430fr5969_16.build.core=msp430

lpmsp430fr5969_16.build.variant=launchpad_fr5969

lpmsp430fr5969_16.upload.maximum_ram_size=1024

##############################################################

Now, when we open Energia, we can see both board entries in the list. To test this out, I used the WS2811 driver library available here: http://forum.43oh.com/topic/2882-energia-library-ws2811driver-led-controller-class/

This library checks the CPU speed of the selected MSP430 microcontroller, and uses an appropriate assembly library for the timing critical elements, so if the CPU was running at 8MHz it wouldn’t work. Just loading the example that comes with the library, and connecting the LED strand however, shows that we are indeed running at 16MHz.

It should be noted though, that this has not been tested for all functions in the Energia libraries, and some things might not work 100% of the time, but it should work for most things, especially adding LEDs to your microcontroller projects!

There’s a common misconception when designing with a fully differential amplifier (FDA). Designers often convert a single-ended bipolar signal into a differential signal with a DC offset to drive an analog-to-digital converter (ADC) with a single positive supply in a configuration similar to the one shown in Figure 1.    

Figure 1: FDA driving an ADC

In this example, a single-ended +/-1V signal is converted to a differential signal with a gain of -2 and shifted up by 1.5V to drive an ADC with a single supply.

The misconception is that the FDA must have a symmetrical negative supply since its input is symmetrical with respect to ground. However, if the FDA can accept inputs as low as its negative supply, the symmetrical negative supply is unnecessary. You can actually use the board ground as the FDA’s negative supply, as illustrated in Figure 2. 

Figure 2: Typical FDA circuit performing the single-ended-to-differential conversion

With the negative FDA supply at ground, the FDA’s negative ouput, Vout_neg, can never be below ground. Since the positive input of the FDA, Vin_pos, is just Vout_neg attenuated by Rg/(Rg+Rf), Vin_pos can never be below ground. The high open-loop gain of the FDA creates a virtual short between the two inputs, which ensures that the FDA’s negative input, Vin_neg, is never below ground.

Even if the input signal is pseudo-differential and referenced to a negative voltage, you may still be able to use ground as the negative supply of the FDA. In Figure 3, assume that Vref = -0.1V, minimum Vout from the FDA data sheet is 0.2V, and Rf = 2Rg for a gain of -2:

Figure 3: FDA with a pseudo-differential input

The equation for the minimum input on the FDA positive input, Vin_pos, is as follows:

The virtual short at the FDA inputs ensures the inputs of the FDA will never be below ground.

If you set the FDA gain and Vocm so that the minimum Vout_neg is higher than the value specified in the FDA data sheet as the minimum output, even lower values of Vref may be acceptable.

The bottom line is that an FDA with negative-rail inputs (NRI) can save the expense and board space of a negative FDA power supply when converting a single-ended or pseudo-differential signal into a differential signal with positive offset. Be sure to look for a single FDA supply between 3V and 5V and consider a high-bandwidth, low-power FDA, like the THS4521.

Additional resources:

• Learn how to use single-supply FDAs with negative input voltages to drive ADCs (technical article). 
• Read about how to use FDAs as attenuators (technical article).
• Check out other high-speed amplifier blog posts. 

ADCs require one or more power supplies whose sensitivity may affect the data acquisition of the ADC if precautions are not taken. Power-supply sensitivity is independent from clocking jitter issues, which are fairly well understood at this time.  We will only focus on deriving power-supply sensitivity in this post, using the high-speed TI ADC3444 ADC as an example.  The ADC3444 is a quad-channel 14bit 125Mbps ADC designed for high-performance multichannel applications.

Looking at the data sheet the ADC3444 has two distinct power supplies: a 1.8V analog supply and a 1.8V digital supply.  The data sheet provides the following information in the electrical characteristics (Section 7.7) section and in the application section (Section 11).

When evaluating the performance of an ADC, the ADC has the advantage of being its own digitizer. We are interested in what will happen to the fast Fourier transform (FFT) while digitizing a single-tone signal and adding a noise tone to the ADC power-supply pins. In order to simplify, we will not worry about the supply noise, but will send a sine wave superimposed on the DC power-supply voltage. We can achieve this superimposition using a power amplifier, as shown in Figure 1.

Figure 1: Power amplifier simplified schematic

Note that the DC gain is set to 1V/V. The small isolation resistor is used at the output to help prevent instability in the amplifier caused by capacitive loading.

At this point, we will only be looking at measuring the power-supply characteristic of the ADC at a single frequency, leaving a full PSRR-over-frequency plot for later. Since the ADC has very high analog bandwidth, we expect the PSRR of the analog supply to be flat to high frequency – or at least beyond the maximum frequency of interest when designing a power supply. In the case of the ADC3444, the analog input bandwidth is 540MHz. Note that adding any bypass capacitance on the power-supply pin will improve the measured PSR at high frequency, as any high frequency will be bypassed by the capacitor.

The test configuration, shown in figure 2, does not make any distinction between the analog supply pin (AVDD) and the digital supply pin (DVDD).  To isolate possible interactions between the AVDD and DVDD supplies, the measurement procedure introduces a noise tone on a single supply at a time.  The decoupling on each supply follows the ADC3444 datasheet recommendation. The thirteen AVDD pins will use each a 0.1µF, X7R capacitor for a total of 1.3µF.  Similarly, the four DVDD supply pins will each have a 0.22µF, for a total of 0.88µF on the DVDD supply.

Figure 2: Test configuration

Figure 3 shows the results for ADC3444 power supplies.  Each chart below is the Fast Fourier Transform (FFT) of the analog signal.  The FFT is the decomposition of the signal as a sum of sinewave.  Simply put, the charts show the frequency content of the signal.  The x-axis is thus the frequency, with the y-axis representing the magnitude of each sinewave.  In the example below, we use a 100MHz clock, resulting in the acquisition bandwidth of 50MHz.

The signal fed to the ADC is a 19.8MHz with a magnitude of -2dBFS (dB Below Full Scale).  This is shown in figure 3, which is the reference signal with no noise tone.

Figure 3: ADC3444 AVDD reference FFT

 To evaluate the PSR of the ADC, the following procedure is devised for each supply:

1-      Connect the amplifier to the power supply being evaluated [Here this will be either the AVDD or the DVDD]

2-      Connect the DC-power supply to the other power supplies.  [This DC power supply is a clean power supply and has been selected for its low noise characteristics]

3-      Turn on the noise tone and capture the FFT.  [The noise tone has been selected to maximize the disturbance on the supply pins under test, while still respecting the supply tolerance.]

Figure 4 shows the same signal tone into the ADC, but this time adding a noise tone in the AVDD power supply pin.  Since all other conditions are equal, any degradation on the FTT can be correlated to the addition of the noise tone on the AVDD supply.

Figure 4: ADC3444 AVDD response to 100mVpp 1MHz sinewave superimposed to the 1.8V

We then repeat the same experiment on the DVDD supply pin and obtain the chart shown in figure 5.  This time the noise tone is only present on the DVDD supply.

Figure 5: ADC3444 DVDD response to 100mVpp 1MHz sinewave superimposed to the 1.8V

Notice that for the AVDD supply (Figure 4), three additional spurs have appeared: at 1MHz, 18.8MHz and 20.8MHz. The first tone is to be expected, as the noise tone gets added to the acquired spectrum. The two other undesired tones are exactly 1MHz to the right and to the left, symmetrical to the center frequency.

For the DVDD supply, the only difference between Figure 3 and Figure 5 is a new spur at 1MHz.

Figure 6 summarizes the location of the spurs. Note that the spurs’ amplitudes are intended to be purely descriptive and not quantitative.

Figure 6: Spurs location for AVDD and DVDD supplies

 Now that we have an initial measurement, we still need to interpret it to be able to extract the desired PSRR spec. The 100mV AC signal, called a disturbance signal, ensures that it will be sufficiently large enough to stick out of the ADC noise floor, while not so large that it will violate the operating voltage range on both AVDD and DVDD.

Let’s use Figures 6 and 7 to help us interpret the result and translate the dB below full scale (dBFS) to a PSRR specification. Say that the fundamental amplitude is -2dBFS. Since the ADC3444 data sheet, in figure 7, tells us that 0dBFS (or full scale) is 2Vpp, we can convert the dBFS into Vpp. This is possible with Equation 1 below:

Applying this to the -2dBFS fundamental, the differential voltage swing at the ADC’s input is: 

We can now convert the dBFS measurement from the ADC FFT result into a signal that we can compare to the AC input signal, and thus calculate how much rejection the ADC power supply has. The 100mV signal on the AVDD supply has an impact of -95dBFS for a -2dBFS signal. The data sheet tells us that 0dBFS is 2Vpp (see Figure 5), so the -95dBFS can be calculated by:

The PSRR can then be calculated with Equation 2: 

Plugging the numbers into Equation 2 gives us the PSRR (Power Supply Rejection Ratio) for a -2dBFS fundamental amplitude and a 1MHz disturber signal on the power supply.

Figure 7: Analog input electrical characteristics

By repeating the procedure described here for each supply and at multiple frequencies, it is easy to develop a PSR model for any ADC.  Note that the PSR model includes the effect of the recommended bypass capacitors.

The techniques in this post are just the first step for evaluating ADC power-supply PSR. The next posts will describe how to use this information to characterize an ADC power supply and to guide product and external component selection.

Here are the titles for the post that will apply the methodology described here to develop a real-world power supply solution:

-          ADC Power Supply Rejection, Calculating Allowed Supply Ripple

-          Using a DC-DC converter to power an ADC

-          Noise Requirement for ADC Power Supply

-          DC-DC converter post-filtering strategies

-          Designing a power supply solution for high-performance pipeline ADCs

Additional information on the ADC3444 EVM can be found at ADC3444EVM.  This EVM power supply reference design is using the low noise high performance LDO TPS7A4701. Learn more about and search all LDOs here.

The newly sampling MSP430 FRAM Microcontroller, MSP430FR6972, combines the world’s lowest power, FRAM technology and a segment LCD controller to meet the needs of various microcontroller projects from portable medical equipment to thermostats.

Since this ultra-low-power microcontroller is one of many in our portfolio, we thought it would be fitting to explain the value of the scalable FRAM MCU family in addition to the ways the platform can save you time/money when working on your projects. So, over the course of this week, we will release 5 microcontroller use-cases in 5 days! Today, we will start with the growing need to do more with less energy.

Reducing system energy consumption continues to be a big challenge in microcontroller development, and I’m not just saying that because we make ultra-low-power microcontrollers. As the internet of things (IoT) continues to expand, we are seeing more and more devices operating without line power, most of which run on batteries. This can be explained in part by the need for new products to operate, regardless of the infrastructure provided. After all, power isn’t always readily available for an electronic door lock or a window glass breakage detector. A key problem for developers creating battery-operated devices is that changing batteries is often difficult or simply inconvenient for consumers. I know that I wouldn’t want to go around changing batteries for every sensor connected to my security system and charging my wearable electronics every day just isn’t fun.

So how can the MSP430 FRAM platform help? Not only is the FRAM family the lowest power in our portfolio, but also in the industry, as demonstrated by the new ULPBench™ benchmark from EEMBC. It achieves industry leading power in active mode and standby mode due to a number of key device features. Some of these features exist across the MSP430 portfolio, but with a few improvements and FRAM technology, these microcontrollers achieve a new level of efficiency.

• 7 flexible low-power modes enable optimization of overall power consumption

• Analog and digital peripherals can run autonomously in low-power modes (this includes the ADC with integrated window comparator on the MSP430FR6972)

• Wake upquickly (in as little as 7 µs) thanks to our ultra-fast digitally controlled oscillator

• Low-power real-time clock precisely keeps time and enables wakeup at specified intervals

• Direct memory access is available on some devices to enable memory transfer with no CPU intervention

• FRAM technology enables ultra-low-power writes and combine with fast speeds and non-volatility for data backup when power fails

Beyond the microcontroller itself, EnergyTrace™ technology now simplifies the debugging process by enabling developers to get a real-time power profile of the project. This is available on all MSP430FRx FRAM microcontrollers, and goes a step further with EnergyTrace++™ technology and peripheral-level detail on the MSP430FR6972 microcontroller.

EnergyTrace technology and the other low-power features described, all come together to extend the battery life of electronic systems. In fact, if you look at systems like the door lock or glass break detector, sometimes changing batteries is not even necessary! With MSP430 ultra-low-power microcontrollers minimizing system power, the BQ25570 power-management device can be leveraged for storing harvested energy from light in a super capacitor or battery. This means real convenience and cost savings for consumers.

So how does this all save cost for you, the developer? The reality is microcontroller projects are rarely found in a vacuum. Even if you are working on a first product, it may lead to others. This could be in the form of improvements to the original product to increase functionality, or could contribute to an ecosystem of products that work together. The best way to minimize development costs in these scenarios is to minimize time to market. The MSP430FRx FRAM microcontroller family can make this possible with over 100 devices available. This gives developers code-compatible and in some cases pin-compatible options for expanding/reducing memory or features.

Sound good? Learn more about what a scalable portfolio can mean to you, in our whitepaper releasing tomorrow and explore the scalable FRAM MCU portfolio to find the right starting point for your project today!

Two days into sampling the ultra-low-power MSP430FR6972 FRAM microcontroller, and we have another use-case to explain the value of the scalable FRAM MCU portfolio.

‘Smart’ components are becoming prevalent in many embedded systems. In a large factory setting sensor nodes could be used to gather, store and process data related to flow of liquid through pipes or vibration on a motor to identify problems. If all of this data was transmitted to a central hub, it would consume an abundance of energy, when only critical information is really needed by the hub that is in charge of monitoring the entire system. Therefore, logging data and then processing that data to make intelligent decisions about the state of a specific piece of the system can be done on the sensor node itself.

With FRAM, systems that require data logging can become smarter by collecting data more quickly and for a longer period of time than on traditional microcontrollers. This is due to the extremely fast write speeds (nearly 100x the speed of writing to Flash) and write endurance of 10¹⁵, that this memory technology enables. To a system this means more data can be collected and processed per node, which can minimize errors in decision making.

The FRAM family within the MSP430 microcontroller portfolio provides a scalable platform for developers to use across these factory nodes. Code compatible MCU options are available between 4 KB to 128 KB of FRAM to deal with the data requirements of many nodes. By leveraging the same family of microcontrollers, coding can be minimized across development of new nodes and cost can be optimized based on the amount of data that is required. This goes a step further when you consider the analog integration options across the family. The MSP430FR2033 MCU is an example from the family that offers an integrated 10-channel ADC with 10-bit resolution for connecting directly to analog sensors, but an ADC with more channels and up to 12-bit resolution is available on the new MSP430FR6972 and other devices in the series. Not only that, these ADCs can run smarter without CPU intervention, to minimize power consumption of the nodes.

To learn more about the ways scalability can help in a system, check out the new whitepaper and then take a look at the full family of options that are now available!

Both at home and at work, we are becoming increasingly accustomed to conveniences like high-definition video streaming, millisecond financial transactions and on-demand software as a service (SaaS). To support the ballooning requirement for higher rates of data transfer, the modern-day data center has been quietly on the forefront of high-tech innovation.

A field that began rather humbly, focusing on megabits-per-second data transfer, is now a complex and vibrant ecosystem of mechanical and electrical standards for storage and networking, ranging from 1 Gbps to 100 Gbps. Yet while data centers continue to push technical boundaries each year, it is still normal to hear phrases like “black magic” and “voodoo” used in high-speed design centers.

Hardware designers implementing high-speed interfaces in their storage and networking enterprise systems often rely on sophisticated, expensive design tools to increase their confidence in new chassis designs before proceeding to hardware fabrication. However, system designers lack an easy-to-use tool that can help them narrow down their solutions before beginning more intensive system simulations. In the absence of a simplified simulation tool, system modeling can become complex and prohibitive for smaller businesses or “white box” server vendors (unbranded servers offered by contract manufacturers). To simplify and accelerate the product selection and validation process for every customer, TI has released a groundbreaking new high-speed simulation tool—WEBENCH® Interface Designer.

WEBENCH Interface Designer is a free, browser-based interface design and simulation tool that enables designers to:

• Visualize their high-speed link by selecting TI interface ICs and custom channel properties to model their system
• Analyze the electrical performance and specification compliance of their links by using a built-in, Input/Output Buffer Information Specification (IBIS) Algorithmic Modeling Interface (AMI) standard-compliant signal integrity analysis engine
• Optimize their design by leveraging the full configurability of IBIS AMI models and a real-time eye diagram plot for quick iteration. Link optimization is a unique capability of this tool, reducing iterations when trying to find the optimal design parameters.

Industry professionals will have an opportunity to see Interface Designer live at DesignCon 2015, booth #817, where TI and FCI will be demonstrating an Interface Designer simulation side by side with real hardware, leveraging TI’s DS125BR820 multiprotocol redriver and FCI’s AirMax VS2™ connector. TI is also pushing the boundaries of data center innovation, demonstrating 25 Gbps signal conditioning with FCI (booth #817) and TE Connectivity (booth # 743). For more product information, see www.ti.com/sigcon.

To test Interface Designer for yourself, go to ti.com/webenchinterface and push some boundaries of your own.

Additional resources:

• Visit the WEBENCH Design Center at ti.com/webench
• Get more info about the high-performance DS125BR820 and DS80PCI810 redrivers and the DS125DF1610 retimer
• Learn more about FCI and TE Connectivity

Day 3 of sampling the ultra-low-power MSP430FR6972 FRAM microcontroller and we have another use-case to explain the value of the scalable FRAM MCU portfolio.

Yesterday, we talked about the ability to use FRAM-based microcontrollers for data-logging and decision making as a part of a larger system, but there is still a need for wireless connectivity. Texas Instruments offers a number of solutions for adding connectivity to a system including:

RF430CL330H dynamic NFC transponder enables static tag emulation

CC3100 SimpleLink Wi-Fi networking solution

CC1101 low-power sub-1GHz RF transceiver

The solutions available within the TI portfolio may require stacks to reside on the MSP430 microcontroller, but some devices like the CC3100 Wi-Fi solution, handle the wireless stack within the device itself. Depending on stack requirements on the MCU, having a range of memory options become critical. Bluetooth, for instance, can often require 100 kB of Flash for standard connection profiles alone, while when a stack is handled on a device external to the MCU, memory can be reduced for program and data as required by the application.

FRAM microcontrollers can add value in a number of other ways that are relevant to wireless systems as well. The MSP430FR6972 MCU and other parts in the FRAM family offer more reliable firmware updates, for instance. This can be beneficial in applications where systems are located in remote or dangerous locations. With FRAM MCUs, data can be written on the fly without pre-erase, buffering, or the power consumption of typical microcontrollers. This means that software development is simpler, data is secure on power loss and battery life can be extended by limiting active time of the radio.

Once you have the required connectivity setup for your system, different peripherals are available across the FRAM microcontroller family. Depending on the needs of an application this MCU family offers multiple segment LCD driver options, ADCs of different resolution, security peripherals and more!

Example code is available for connecting the MSP430FRx microcontrollers using the protocols discussed above. To continue learning about how our scalable FRAM portfolio can simplify your development, check out the new whitepaper!

TI is a great place to work. We’re continually recognized in Fortune magazine as a “most admired company” and by others for our excellence and contributions to the community. Most recently, we were recognized as one of the top 50 employers in 2015 for people with disabilities by Careers & the disABLED magazine.

Our goal is to provide an environment at TI where every person can thrive. We want our employees — no matter their backgrounds, work styles, ideas, or differences — to feel empowered to be who they are and to do their best work. This award means a lot to us, because it was the readers of this publication who were asked to name the employers, both private and public sector, for whom they would most like to work for or that they believe would provide a progressive environment for people with disabilities.

So, how do we recruit and retain talent with disabilities? It starts with us attending more than 400 recruiting events each year, including those specifically for people with disabilities. We also continue to offer a wide range of resources and activities to build diversity awareness and an inclusive environment at TI. These include:

• Access to our TI Diversity Network (TIDN), providing career development, recognition and mentoring support for more than 30 initiatives made up of employees from various ethnic, racial, and religious backgrounds, gay, lesbian, bisexual and transgender employees, employees with disabilities, and U.S. military veterans and their families
• Access to forums and webinars offered by industry experts such as Catalyst, Corporate Executive Board, and Conference Board
• “Fireside chats” with members of our board
• Networking events for new employees
• Our ongoing internal diversity blog

It’s an exciting time to be a part of our company, as I get to watch each and every day how our diversity is fueling innovation. And I’m honored that others, like Careers & the disABLED magazine, see the value in hiring people from all different backgrounds and experiences to challenge what’s possible.

To learn more about opportunities at TI, just head to our careers page.

Day 4 of sampling the ultra-low-power MSP430FR6972 FRAM microcontroller and we have another use-case to explain the value of the scalable FRAM MCU portfolio.

As we discussed in the past few days, a scalable microcontroller platform can add value in terms of reducing energy, context-aware products and connected systems. Today, we will take a brief look at security. The MSP430 FRAM microcontroller portfolio offers both intrinsic advantages due to FRAM and varying peripherals depending on the security needs of your system.

All MSP430FRx MCUs enable some key security advantages that can provide some code/data security for your system. FRAM does not require a charge pump, is resistant to electric/magnetic fields and can retain state on power failure that offers the following benefits:

• Memory is protected from some types of physical attacks
• FRAM is not susceptible to soft errors
• FRAM can be used to update security keys quickly and send notifications in case of certain state changes

Beyond the basics, peripherals across the microcontroller family vary across price points and memory configurations. For instance, the MSP430FR2033 inside our baseline MSP430FR2x series of the FRAM portfolio provides some basic JTAG and memory lock capabilities. The MSP430FR6972 on the other hand has more features, offering a 256-bit AES encryption engine, a true random number seed and IP encapsulation for locking specific pieces of memory.

To learn more about how the scalable MSP430 FRAM portfolio can increase security and simplify your development, check out the new whitepaper!

How many portable devices do you have on you right now? How many of these can be charged from a USB port? How many times do you have to charge each of these?

Now, think about how much time you spend in your car every day. You commute to and from the office, then out to lunch and back. Maybe, you go to a soccer or baseball game in the evening with your friends or children. What if your portable devices could be charging for all of the time that you’re in your car? They would always be charged and ready to go when needed.

Automobile manufacturers are continuously adding more and more USB ports to new vehicles. Insufficient are just two ports for the entire back seat. Now, at least two ports are needed per seat—and maybe more will be needed in the future. Of course, with this increase in the number of USB ports comes an increase in the current drawn by each device plugged in. In order to avoid making the car heavier and more expensive, the wire gauge from the engine control unit (ECU) remains the same, while more current is delivered. Clearly, there is a higher voltage drop across this wire and less voltage at the port. I explain why this matters in more detail in a previous blog.

In order to provide sufficient voltage to these USB ports, a simple change is needed to the existing power delivery circuit. By adding the INA213 current sense amplifier, the voltage at the USB port where your portable devices are can be dynamically adjusted, based on the current delivered to the USB ports. In this way, the 5V at your device is well-regulated even with small gauge wires and the long distance from the ECU to the backseat ports.

By adding a small and low cost current sense amplifier to the existing TPS62130A-Q1 power supply, the same USB port power architecture is kept with minimal increases in Bill of Materials (BOM) cost or Printed Circuit Board (PCB) size. The result is overcoming a key technical issue with multiple USB ports in vehicles—overcoming the voltage drop on the wiring to deliver the right voltage to the portable devices to charge them quickly.

Now, your smartphone, MP3 player, smart watch, and fitness tracker can all charge simultaneously while you drive around during the day. What else might you plug in?